1. Field of the Invention
The present invention relates to an amplification circuit for a magneto-resistive (MR) head used for magnetically reproducing recorded data.
2. Description of the Related Art
As a head for reproducing data magnetically recorded in a hard disk drive (HDD) and the like, an MR head is known. The method of recording by an MR head reproduces data using the principle that a resistance changes in accordance with changes of a magnetic flux.
As a data reproducing method using an MR head, there is the current bias voltage sense method. In this method, a current is applied to the MR head to generate a voltage at the head. By sensing a change of the head voltage as the amount of change of a resistance of the MR head in response to the recorded data, reproduction of the recorded data is realized.
FIG. 1 is a circuit diagram of the configuration of an MR head and an amplification circuit for amplifying a head voltage in a data reproducing apparatus using the MR method.
As shown in the figure, a differential amplification circuit is configured by resistors RI and R2, transistors Q1 and Q2, a capacitor C2, and current sources IS1 and IS2. The capacitor C2 is connected between emitters of the transistors Q1 and Q2, and the current sources IS1 and IS2 are respectively connected to the emitters of the transistors Q1 and Q2 to supply a driving current to the transistors. The resistors R1 and R2 are respectively connected between collectors of the transistors Q1 and Q2 and the power source voltage Vcc to form a load for the transistors.
The two ends of a resistor of the MR head (hereinafter simply referred to as a head resistor) R.sub.MR are respectively connected to bases of the transistors Q1 and Q2. A bias current is supplied to the head resistor R.sub.MR by a bias current source IS.sub.B. The series connected resistors R3 and R4 are connected in parallel to the head resistor R.sub.MR. A connecting point of the resistors R3 and R4 is connected to a non-inverted (positive polarity) input terminal "+" of the differential amplification circuit AMP1 and an inverted (negative polarity) input terminal "-" is grounded. An output terminal of the differential amplification circuit AMP1 is connected to a base of the transistor Q3, a collector of the transistor Q3 is connected to the head resistor R.sub.MR, and the emitter is connected via resistor C7 to a negative power source voltage V.sub.ee. Furthermore, a capacitor C1 is connected between the base of the transistor Q3 and the negative power source voltage V.sub.ee.
In the MR head and the amplification circuit therefor configured as above, for example, a bias current i.sub.B flows to the head resistor R.sub.MR by the bias current source IS.sub.B and the bias current i.sub.B flows to the negative power source voltage V.sub.ee via the transistor Q3.
When reading data, when defining an amount of change of a resistance of the head resistor R.sub.MR as .DELTA.r in accordance with the recorded data, a voltage change of exactly (i.sub.B .times..DELTA.r) occurs at the two ends of the head resistor R.sub.MR. This amount of voltage change is amplified by the differential amplification circuit configured by the transistors Q1 and Q2 and so forth and an output voltage V.sub.out is output, therefore the recorded data can be read in accordance with a level of the output voltage V.sub.out.
Since the MR head is easily affected by static electricity, it is necessary that the potential of the MR head be held close to the ground potential GND as much as possible. Accordingly, an intermediate potential of a potential difference R.sub.MR (i.sub.B .times.r) of the two ends of the head resistor is generated and a feedback circuit is configured by the differential amplification circuit AMP1 and the transistor Q3 so as to set the intermediate potential as close as possible to the ground potential GND. Note that r here represents a resistance of the head resistor R.sub.MR. Also, the capacitor C1 is provided for phase compensation of the feedback circuit configured by the differential amplification circuit AMP1 and the transistor Q3.
Since the two ends of the head resistor R.sub.MR are connected to the bases of the transistors Q1 and Q2, the amount of voltage change (i.sub.B .times..DELTA.r) caused by the change of the resistance of the head resistor R.sub.MR at the time of reproduction is amplified by the differential amplification circuit. Also, a direct current component of (i.sub.B .times.r) is constantly generated at the two ends of the head resistor R.sub.MR, so that a direct current cut-off capacitor C2 is connected between the emitters of the transistors Q1 and Q2 configuring the differential amplification circuit.
Here, the resistors R3 and R4 have the same resistance. When a voltage drop (i.sub.B .times.r) caused at the head resistor R.sub.MR by the current value i.sub.B of the bias current source IS.sub.B is 500 mV, the potential at the terminal by which the head resistor R.sub.MR is connected to the collector of the transistor Q3 becomes about -250 mV. Accordingly, when defining a voltage between the base and emitter of the transistor Q2 as V.sub.BE, an emitter potential of the transistor Q2 becomes (-250-V.sub.BE) which is a negative potential, therefore the current sources IS1 and IS2 are connected so as to pass a current to the side of the negative power source voltage V.sub.ee.
In the above MR head and the amplification circuit therefor of the related art, it is necessary to generate a large amount of current at the current sources IS1 and IS2 in order to reduce noise generated in the amplification circuit at the time of reproduction. This is because the shot-noise of a transistor can be expressed as a voltage generated at the base in the formula below. EQU .sqroot.e.sub.n.sup.2 =.sqroot.2q.multidot.V.sub.T.sup.2 /Ic[nV/.sqroot.H.sub.Z ] (1)
Where, q represents a charge of an electron,
V.sub.T =KT/q, PA1 K represents Boltzmann's constant, PA1 T represents the absolute temperature, and PA1 I.sub.C represents a collector current of the transistor.
According to the formula (1), the larger a current flowing to the transistor, the smaller the noise generated. When increasing the transistor current, however, a load current flowing between the power source voltage V.sub.cc. and the negative power source voltage V.sub.ee becomes large. As a result, there is a disadvantage that the power consumption increases.
Furthermore, in the differential amplification circuit configured by the transistors Q1 and Q2 and so forth, a high-pass filter (HPF) is formed by the capacitor C2 and emitter resistance r.sub.e of the transistors Q1 and Q2. For amplification, without major deterioration, of the necessary frequency components of a voltage change signal sensed by the head resistor R.sub.MR, it is suitable that a cut-off frequency f.sub.c, of the high-pass filter be 1/10 of the frequency component of the signal or less. The relationship of the cut-off frequency f.sub.c and the emitter resistance r.sub.e of the high-pass filter and the capacitor C2 is shown by the formula below: EQU f.sub.c =1/(2.pi..multidot.2r.sub.e .multidot.C.sub.2)[H.sub.z ](2)
Here, when a frequency component f.sub.s of a signal is 5 MHz, a cut-off frequency f.sub.c is 500 kHz. Furthermore, when setting the Boltzmann constant V.sub.T to 26 mV and the collector currents I.sub.c of the transistors Q1 and Q2 to 5 mA, the emitter resistance r.sub.e of the transistors Q1 and Q2 becomes (V.sub.T /I.sub.c =5.2 .OMEGA.). The capacitor C.sub.2 of the capacitor C2 can be obtained from the formula (2). Namely, C.sub.2 =32 nF can be obtained. Therefore, it is necessary to connect a large direct current cut-off capacitor C2 between the transistors Q1 and Q2 and to place the capacitor C2 outside the IC chip as an external part.